EURASIP Open Library

Conference proceedings 1996-2017


All publications by Sentieys, O. displayed in reverse chronological order (clear)


Channel-Aware Energy Optimization Of Ofdm Receivers Using Dynamic Precision Scaling In Fpgas

Authors (alphabetically): Cladera, Fernando; Gautier, Matthieu; Sentieys, O.;

EUSIPCO, Nice, France, 2015


Novel Algorithms For Word-Length Optimization

Authors (alphabetically): Menard, Daniel; Nguyen, Hai-Nam; Sentieys, O.;

EUSIPCO, Barcelona, Spain, 2011


Fixed-Point Accuracy Evaluation In The Context Of Conditional Structures

Authors (alphabetically): Menard, Daniel; Meunier, Quentin; Naud, Jean-Charles; Sentieys, O.;

EUSIPCO, Barcelona, Spain, 2011


Estimating Frequency Characteristics Of Quantization Noise For Performance Evaluation Of Fixed Point Systems

Authors (alphabetically): Menard, Daniel; Parashar, Karthick; Sentieys, O.;

EUSIPCO, Aalborg, Denmark, 2010


Design Of Optimized Fixed-Point Wcdma Receiver

Authors (alphabetically): Menard, Daniel; Nguyen, Hai-Nam; Sentieys, O.;

EUSIPCO, Glasgow, Scotland, 2009


Analytical Accuracy Evaluation Of Fixed-Point Systems

Authors (alphabetically): Menard, Daniel; Rocher, Romuald; Scalart, P.; Sentieys, O.;

EUSIPCO, Poznan, Poland, 2007


Hardware Task Scheduling For Heterogeneous Soc Architectures

Authors (alphabetically): Benkermi, Imène; Chillet, D.; Pillement, Sébastien; Sentieys, O.;

EUSIPCO, Poznan, Poland, 2007


Roundoff Noise Analysis Of Finite Wordlength Realizations With The Implicit State-Space Framework

Authors (alphabetically): Hilaire, Thibault; Menard, Daniel; Sentieys, O.;

EUSIPCO, Poznan, Poland, 2007


Automatic Sqnr Determination In Non-Linear And Non-Recursive Fixed-Point Systems

Authors (alphabetically): Menard, Daniel; Rocher, Romuald; Scalart, P.; Sentieys, O.;

EUSIPCO, Viena, Austria, 2004


Influence Of Fixed-Point Dsp Architecture On Computation Accuracy

Authors (alphabetically): Menard, Daniel; Quemerais, Philippe; Sentieys, O.;

EUSIPCO, Toulouse, France, 2002


Asynchronous Timing Model For High-Level Synthesis Of Dsp Applications

Authors (alphabetically): Chillet, D.; Dedou, Okito; Sentieys, O.;

EUSIPCO, Rhodes, Greece, 1998


Vlsi Implementation And Complexity Comparison Of Residue Generators Modulo 3

Authors (alphabetically): Pedron, Fabrice; Piestrak, Stanislaw J.; Sentieys, O.;

EUSIPCO, Rhodes, Greece, 1998


Memory Aspects In Signal Processing And Hls Tool : Some Results

Authors (alphabetically): Chillet, D.; Diguet, JP.; Philippe, J.L.; Sentieys, O.;

EUSIPCO, Trieste, Italy, 1996